diff --git a/src/apu.rs b/src/apu.rs
index dbbe28918765d4985a460b20437406fcf88e3902..1e26fe1abc9423c64fbc8853cca7b4da56a62eb1 100644
--- a/src/apu.rs
+++ b/src/apu.rs
@@ -269,7 +269,7 @@ impl Apu {
             return;
         }
 
-        self.sequencer += cycles as u16;
+        self.sequencer += cycles;
         if self.sequencer >= 8192 {
             // each of these steps runs at 512/8 Hz = 64Hz,
             // meaning a complete loop runs at 512 Hz
diff --git a/src/ppu.rs b/src/ppu.rs
index 946f6ac462165ae8f6d6c957930f56f08c1c1221..7df9a92314551da829a7af19492b949161e742cf 100644
--- a/src/ppu.rs
+++ b/src/ppu.rs
@@ -598,7 +598,7 @@ impl Ppu {
 
         // increments the current mode clock by the provided amount
         // of CPU cycles (probably coming from a previous CPU clock)
-        self.mode_clock += cycles as u16;
+        self.mode_clock += cycles;
 
         match self.mode {
             PpuMode::OamRead => {
diff --git a/src/timer.rs b/src/timer.rs
index 7adc5fd9d12ff1b40a241b9ad1c651283f329413..5e67e832838f1bbb9c38995afaca02f1d34d4cd3 100644
--- a/src/timer.rs
+++ b/src/timer.rs
@@ -40,14 +40,14 @@ impl Timer {
     }
 
     pub fn clock(&mut self, cycles: u16) {
-        self.div_clock += cycles as u16;
+        self.div_clock += cycles;
         while self.div_clock >= 256 {
             self.div = self.div.wrapping_add(1);
             self.div_clock -= 256;
         }
 
         if self.tima_enabled {
-            self.tima_clock += cycles as u16;
+            self.tima_clock += cycles;
             while self.tima_clock >= self.tima_ratio {
                 // in case TIMA value overflows must set the
                 // interrupt and update the TIMA value to