From 7387c805cd6cd12e6580a6e7a828c6031e4ea599 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jo=C3=A3o=20Magalh=C3=A3es?= <joamag@gmail.com>
Date: Sat, 25 Jun 2022 10:31:17 +0100
Subject: [PATCH] feat: new flags
---
src/cpu.rs | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/src/cpu.rs b/src/cpu.rs
index 9f7b8fe7..6f2d5d0f 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -1,5 +1,54 @@
pub struct Cpu {
+ pc: u16,
+ sp: u16,
reg_a: u8,
reg_b: u8,
reg_c: u8,
+ reg_d: u8,
+ reg_e: u8,
+ reg_f: u8,
+ reg_h: u8,
+ reg_l: u8,
+}
+
+impl Cpu {
+ #[inline(always)]
+ fn reg_af(&self) -> u16 {
+ (self.reg_a as u16) << 8 | self.reg_f as u16
+ }
+
+ #[inline(always)]
+ fn reg_bc(&self) -> u16 {
+ (self.reg_b as u16) << 8 | self.reg_c as u16
+ }
+
+ #[inline(always)]
+ fn reg_de(&self) -> u16 {
+ (self.reg_d as u16) << 8 | self.reg_e as u16
+ }
+
+ #[inline(always)]
+ fn reg_hl(&self) -> u16 {
+ (self.reg_h as u16) << 8 | self.reg_l as u16
+ }
+
+ #[inline(always)]
+ fn zero_flag(&self) -> bool {
+ self.reg_f & 0x40 == 1
+ }
+
+ #[inline(always)]
+ fn sub_flag(&self) -> bool {
+ self.reg_f & 0x20 == 1
+ }
+
+ #[inline(always)]
+ fn half_carry_flag(&self) -> bool {
+ self.reg_f & 0x10 == 1
+ }
+
+ #[inline(always)]
+ fn carry_flag(&self) -> bool {
+ self.reg_f & 0x08 == 1
+ }
}
--
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