diff --git a/examples/sdl/src/main.rs b/examples/sdl/src/main.rs
index 198494db5ffee3b536a45d0c941c68244316ac40..22232e3d90bea0407cb6aa97414b6cc21338cf94 100644
--- a/examples/sdl/src/main.rs
+++ b/examples/sdl/src/main.rs
@@ -79,7 +79,7 @@ fn main() {
         .unwrap();
 
     let mut game_boy = GameBoy::new();
-    game_boy.load_boot_dmg();
+    game_boy.load_boot_sgb();
     game_boy.load_rom_file("../../res/roms.prop/tetris.gb");
     //game_boy.load_rom_file("../../res/roms/firstwhite.gb");
     //game_boy.load_rom_file("../../res/roms/opus5.gb");
diff --git a/src/cpu.rs b/src/cpu.rs
index da9b50488a6fd925a4aaaa656e58fd58885c58a3..aa1e30a70115ca90539ea57729ed41b9c03e948c 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -80,6 +80,8 @@ impl Cpu {
             return 4;
         }
 
+        // gathers the PC (program counter) reference that
+        // is going to be used in the fetching phase
         let pc = self.pc;
 
         //@todo maybe remove this option as it may
@@ -107,12 +109,12 @@ impl Cpu {
         let (instruction_fn, instruction_time, instruction_str) = instruction;
 
         // if !self.mmu.boot_active() {
-        if *instruction_str == "! UNIMP !" {
-            println!(
-                "{}\t(0x{:02x})\t${:04x} {}",
-                instruction_str, opcode, pc, is_prefix
-            );
-        }
+        //if *instruction_str == "! UNIMP !" {
+        println!(
+            "{}\t(0x{:02x})\t${:04x} {}",
+            instruction_str, opcode, pc, is_prefix
+        );
+        //}
 
         // calls the current instruction and increments the number of
         // cycles executed by the instruction time of the instruction
diff --git a/src/inst.rs b/src/inst.rs
index 726225ea1c65d8f7ce76c21e7def40a78876d213..123779bb4e6ffdf02e116e24ed0b976f082872f3 100644
--- a/src/inst.rs
+++ b/src/inst.rs
@@ -140,20 +140,20 @@ pub const INSTRUCTIONS: [(fn(&mut Cpu), u8, &'static str); 256] = [
     // 0x8 opcodes
     (add_a_b, 4, "ADD A, B"),
     (add_a_c, 4, "ADD A, C"),
-    (noimpl, 4, "! UNIMP !"),
+    (add_a_d, 4, "ADD A, D"),
     (add_a_e, 4, "ADD A, E"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
+    (add_a_h, 4, "ADD A, H"),
+    (add_a_l, 4, "ADD A, L"),
     (add_a_mhl, 8, "ADD A, [HL]"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
+    (add_a_a, 4, "ADD A, A"),
+    (add_a_b, 4, "ADD A, B"),
+    (add_a_c, 4, "ADD A, C"),
+    (add_a_d, 4, "ADD A, D"),
+    (add_a_e, 4, "ADD A, E"),
+    (add_a_h, 4, "ADD A, H"),
+    (add_a_l, 4, "ADD A, L"),
+    (add_a_mhl, 8, "ADD A, [HL]"),
+    (add_a_a, 4, "ADD A, A"),
     // 0x9 opcodes
     (sub_a_b, 4, "SUB A, B"),
     (noimpl, 4, "! UNIMP !"),
@@ -238,7 +238,7 @@ pub const INSTRUCTIONS: [(fn(&mut Cpu), u8, &'static str); 256] = [
     (call_c_u16, 12, "CALL C, u16"),
     (illegal, 4, "ILLEGAL"),
     (noimpl, 4, "! UNIMP !"),
-    (noimpl, 4, "! UNIMP !"),
+    (rst_18h, 16, "RST 18h"),
     // 0xe opcodes
     (ld_mff00u8_a, 12, "LD [FF00+u8], A"),
     (pop_hl, 12, "POP HL"),
@@ -255,7 +255,7 @@ pub const INSTRUCTIONS: [(fn(&mut Cpu), u8, &'static str); 256] = [
     (illegal, 4, "ILLEGAL"),
     (illegal, 4, "ILLEGAL"),
     (xor_a_u8, 8, "XOR A, u8"),
-    (rst_18h, 16, "RST 18h"),
+    (rst_28h, 16, "RST 28h"),
     // 0xf opcodes
     (ld_a_mff00u8, 12, "LD A, [FF00+u8]"),
     (pop_af, 12, "POP AF"),
@@ -1229,15 +1229,31 @@ fn add_a_c(cpu: &mut Cpu) {
     cpu.a = add_set_flags(cpu, cpu.a, cpu.c);
 }
 
+fn add_a_d(cpu: &mut Cpu) {
+    cpu.a = add_set_flags(cpu, cpu.a, cpu.d);
+}
+
 fn add_a_e(cpu: &mut Cpu) {
     cpu.a = add_set_flags(cpu, cpu.a, cpu.e);
 }
 
+fn add_a_h(cpu: &mut Cpu) {
+    cpu.a = add_set_flags(cpu, cpu.a, cpu.h);
+}
+
+fn add_a_l(cpu: &mut Cpu) {
+    cpu.a = add_set_flags(cpu, cpu.a, cpu.l);
+}
+
 fn add_a_mhl(cpu: &mut Cpu) {
     let byte = cpu.mmu.read(cpu.hl());
     cpu.a = add_set_flags(cpu, cpu.a, byte);
 }
 
+fn add_a_a(cpu: &mut Cpu) {
+    cpu.a = add_set_flags(cpu, cpu.a, cpu.a);
+}
+
 fn sub_a_b(cpu: &mut Cpu) {
     cpu.a = sub_set_flags(cpu, cpu.a, cpu.b);
 }
@@ -1524,6 +1540,10 @@ fn call_c_u16(cpu: &mut Cpu) {
     cpu.ticks = cpu.ticks.wrapping_add(12);
 }
 
+fn rst_18h(cpu: &mut Cpu) {
+    rst(cpu, 0x0018);
+}
+
 fn ld_mff00u8_a(cpu: &mut Cpu) {
     let byte = cpu.read_u8();
     cpu.mmu.write(0xff00 + byte as u16, cpu.a);
@@ -1572,8 +1592,8 @@ fn xor_a_u8(cpu: &mut Cpu) {
     cpu.set_carry(false);
 }
 
-fn rst_18h(cpu: &mut Cpu) {
-    rst(cpu, 0x0018);
+fn rst_28h(cpu: &mut Cpu) {
+    rst(cpu, 0x0028);
 }
 
 fn ld_a_mff00u8(cpu: &mut Cpu) {
diff --git a/src/mmu.rs b/src/mmu.rs
index 7126ba780e6ceefad33aacd098ea3134086cbf70..ce4c54d245ce21bf419dad19d61a4095e7bf5fde 100644
--- a/src/mmu.rs
+++ b/src/mmu.rs
@@ -98,13 +98,13 @@ impl Mmu {
         match addr & 0xf000 {
             // BOOT (256 B) + ROM0 (4 KB/16 KB)
             0x0000 => {
-                self.rom[addr as usize] = value;
-                panic!("Writing to BOOT at 0x{:04x}", addr)
+                println!("Writing to ROM 0 at 0x{:04x}", addr)
             }
             // ROM 0 (12 KB/16 KB)
-            0x1000 | 0x2000 | 0x3000 => {
-                panic!("Writing to ROM 0 at 0x{:04x}", addr);
-            }
+            0x1000 | 0x2000 | 0x3000 => match addr {
+                0x2000 => (),
+                _ => panic!("Writing to ROM 0 at 0x{:04x}", addr),
+            },
             // ROM 1 (Unbanked) (16 KB)
             0x4000 | 0x5000 | 0x6000 | 0x7000 => {
                 panic!("Writing to ROM 1 at 0x{:04x}", addr);