From d233d07ed28c9b56aaf377ca88573550f07dcc20 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jo=C3=A3o=20Magalh=C3=A3es?= <joamag@gmail.com>
Date: Sat, 2 Jul 2022 12:32:08 +0100
Subject: [PATCH] =?UTF-8?q?feat:=20initial=20boot=20loading=20support=20?=
 =?UTF-8?q?=F0=9F=99=8C?=
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---
 src/mmu.rs | 16 +++++-----------
 src/ppu.rs | 13 +++++++++----
 2 files changed, 14 insertions(+), 15 deletions(-)

diff --git a/src/mmu.rs b/src/mmu.rs
index 8b333bd2..06a10491 100644
--- a/src/mmu.rs
+++ b/src/mmu.rs
@@ -49,22 +49,16 @@ impl Mmu {
             }
             // ROM0 (12 KB/16 KB)
             0x1000 | 0x2000 | 0x3000 => self.rom[addr as usize],
-            // ROM1 (unbanked) (16 KB)
+            // ROM1 (Unbanked) (16 KB)
             0x4000 | 0x5000 | 0x6000 | 0x7000 => self.rom[addr as usize],
             // Graphics: VRAM (8 KB)
-            0x8000 | 0x9000 => {
-                self.ppu.vram[(addr & 0x1fff) as usize]
-            }
+            0x8000 | 0x9000 => self.ppu.vram[(addr & 0x1fff) as usize],
             // External RAM (8 KB)
-            0xa000 | 0xb000 => {
-                self.eram[(addr & 0x1fff) as usize]
-            }
+            0xa000 | 0xb000 => self.eram[(addr & 0x1fff) as usize],
             // Working RAM (8 KB)
             0xc000 | 0xd000 => self.ram[(addr & 0x1fff) as usize],
             // Working RAM Shadow
-            0xe000 => {
-                self.ram[(addr & 0x1fff) as usize]
-            }
+            0xe000 => self.ram[(addr & 0x1fff) as usize],
             // Working RAM Shadow, I/O, Zero-page RAM
             0xf000 => match addr & 0x0f00 {
                 0x000 | 0x100 | 0x200 | 0x300 | 0x400 | 0x500 | 0x600 | 0x700 | 0x800 | 0x900
@@ -102,7 +96,7 @@ impl Mmu {
             0x1000 | 0x2000 | 0x3000 => {
                 println!("WRITING TO ROM 0");
             }
-            // ROM1 (unbanked) (16 KB)
+            // ROM1 (Unbanked) (16 KB)
             0x4000 | 0x5000 | 0x6000 | 0x7000 => {
                 println!("WRITING TO ROM 1");
             }
diff --git a/src/ppu.rs b/src/ppu.rs
index a26556cd..07e1aae1 100644
--- a/src/ppu.rs
+++ b/src/ppu.rs
@@ -218,11 +218,16 @@ impl Ppu {
     }
 
     fn render_line(&mut self) {
+        // obtains the base address of the background map using the bg map flag
+        // that control which background map is going to be used
         let mut map_offset: usize = if self.bg_map { 0x1c00 } else { 0x1800 };
-        map_offset += (((self.line + self.scy) & 0xff) >> 3) as usize;
+
+        // increments the offset by the number of lines and the SCY (scroll Y)
+        // divided by 8 (as the tiles are 8x8 pixels)
+        map_offset += ((((self.line + self.scy) & 0xff) >> 3) as usize) * 32;
 
         // calculates the sprite line offset by using the SCX register
-        // shifted by 3 meaning as the tiles are 8x8
+        // shifted by 3 meaning that the tiles are 8x8
         let mut line_offset: usize = (self.scx >> 3) as usize;
 
         // calculates both the current Y and X positions within the tiles
@@ -233,7 +238,7 @@ impl Ppu {
         // if the tile data set in use is #1, the indices are
         // signed, then calculates a real tile offset
         let mut tile_index = self.vram[map_offset + line_offset] as usize;
-        if self.bg_tile && tile_index < 128 {
+        if !self.bg_tile && tile_index < 128 {
             tile_index += 256;
         }
 
@@ -273,7 +278,7 @@ impl Ppu {
                 // calculates the tile index nad makes sure the value
                 // takes into consideration the bg tile value
                 tile_index = self.vram[map_offset + line_offset] as usize;
-                if self.bg_tile && tile_index < 128 {
+                if !self.bg_tile && tile_index < 128 {
                     tile_index += 256;
                 }
             }
-- 
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