From f045ea6f34e30c7db9c9b1416e61c0c10826ef42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=A3o=20Magalh=C3=A3es?= <joamag@gmail.com> Date: Fri, 11 Nov 2022 11:08:04 +0000 Subject: [PATCH] refactor: more clippy refactor --- src/cpu.rs | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index f4693aba..a6632d06 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -56,7 +56,7 @@ impl Cpu { half_carry: false, carry: false, halted: false, - mmu: mmu, + mmu, cycles: 0, } } @@ -117,14 +117,13 @@ impl Cpu { // @todo this is so bad, need to improve this by an order // of magnitude, to be able to have better performance - if self.halted { - if ((self.mmu.ie & 0x01 == 0x01) && self.mmu.ppu().int_vblank()) + if self.halted + && (((self.mmu.ie & 0x01 == 0x01) && self.mmu.ppu().int_vblank()) || ((self.mmu.ie & 0x02 == 0x02) && self.mmu.ppu().int_stat()) || ((self.mmu.ie & 0x04 == 0x04) && self.mmu.timer().int_tima()) - || ((self.mmu.ie & 0x10 == 0x10) && self.mmu.pad().int_pad()) - { - self.halted = false; - } + || ((self.mmu.ie & 0x10 == 0x10) && self.mmu.pad().int_pad())) + { + self.halted = false; } if self.ime { -- GitLab