fix: major issue with APU address range selection

This issue was prevent CH4 from working properly.
Also added TODO operations to the master volume.

src/apu.rs

@@ -413,12 +413,25 @@ impl Apu {
                 self.ch4_length_stop |= value & 0x40 == 0x40;
                 self.ch4_enabled |= value & 0x80 == 0x80;
                 if value & 0x80 == 0x80 {
-                    self.ch4_timer =
-                        (CH4_DIVISORS[self.ch4_divisor as usize] << self.ch4_clock_shift) as i16;
+                    self.ch4_timer = ((CH4_DIVISORS[self.ch4_divisor as usize] as u16)
+                        << self.ch4_clock_shift) as i16;
                     self.ch4_lfsr = 0x7ff1;
                 }
             }
 
+            // 0xFF24 — NR50: Master volume & VIN panning
+            0xff24 => {
+                //@TODO: Implement master volume & VIN panning
+            }
+            // 0xFF25 — NR51: Sound panning
+            0xff25 => {
+                //@TODO: Implement sound panning
+            }
+            // 0xFF26 — NR52: Sound on/off
+            0xff26 => {
+                //@TODO: Implement sound on/off
+            }
+
             // 0xFF30-0xFF3F — Wave pattern RAM
             0xff30..=0xff3f => {
                 self.wave_ram[addr as usize & 0x000f] = value;
@@ -700,7 +713,8 @@ impl Apu {
             self.ch4_output = 0;
         }
 
-        self.ch4_timer += (CH4_DIVISORS[self.ch4_divisor as usize] << self.ch4_clock_shift) as i16;
+        self.ch4_timer +=
+            ((CH4_DIVISORS[self.ch4_divisor as usize] as u16) << self.ch4_clock_shift) as i16;
     }
 }
 

src/mmu.rs

@@ -170,7 +170,7 @@ impl Mmu {
                                 0x00
                             }
                         },
-                        0x10..=26 | 0x30..=0x37 => self.apu.read(addr),
+                        0x10..=0x26 | 0x30..=0x37 => self.apu.read(addr),
                         0x40 | 0x50 | 0x60 | 0x70 => self.ppu.read(addr),
                         _ => {
                             debugln!("Reading from unknown IO control 0x{:04x}", addr);
@@ -241,7 +241,7 @@ impl Mmu {
                                 0x04..=0x07 => self.timer.write(addr, value),
                                 _ => debugln!("Writing to unknown IO control 0x{:04x}", addr),
                             },
-                            0x10..=26 | 0x30..=0x37 => self.apu.write(addr, value),
+                            0x10..=0x26 | 0x30..=0x37 => self.apu.write(addr, value),
                             0x40 | 0x60 | 0x70 => {
                                 match addr & 0x00ff {
                                     // 0xFF46 — DMA: OAM DMA source address & start