More standard support for the `BusComponent` interface.

Made sure that OAM DMA takes 160 cycles to process.

This is a way of controlling the bytes that have already been written by the DMA controller.

Improved some comments for DMA.

Allow simple screenshot saving.

Handling of GameShark RAM banks differently.
Added parsing integer value errors.

In restoring the VRAM

The wrong value was being store in 0xFF50.

Running under a single call.
This required increasing variable size from u8 to u16.

Adds this CPU speed print support to the web debug panel.

With initial approach for scalling down the speed of other components.

Allows the transfer of data according to the specs in dma.rs.

This is only a structure change and no real DMA implementation has been done.