Made read MMU a non mutable operation.
Added support for CPU description.
Added Display support for CPU.
Extracted type definition for `Instruction`.
Support for diag_gb!() - uses global unsafe approach, which is not problematic for the purpose.
Inline fetch() operation in cpu clock.
Moved pedantic validation up in the CPU.
Fix simple diag issue.
Changed naming of read and write unsafe ops to raw.
New pedantic asserts.
Fix an issue with HDMA destination address prevent CHIP-8 ROM from
working.

Uses simple ranges for matching, optimization done via LLVM.
Faster performance in read and write on x86-64.
Improved code readability.

More standard support for the `BusComponent` interface.

Made sure that OAM DMA takes 160 cycles to process.

This is a way of controlling the bytes that have already been written by the DMA controller.

Improved some comments for DMA.

Allow simple screenshot saving.

Handling of GameShark RAM banks differently.
Added parsing integer value errors.

In restoring the VRAM

The wrong value was being store in 0xFF50.

Running under a single call.
This required increasing variable size from u8 to u16.

Adds this CPU speed print support to the web debug panel.

With initial approach for scalling down the speed of other components.