In restoring the VRAM

The wrong value was being store in 0xFF50.

Running under a single call.
This required increasing variable size from u8 to u16.

Adds this CPU speed print support to the web debug panel.

With initial approach for scalling down the speed of other components.

Allows the transfer of data according to the specs in dma.rs.

This is only a structure change and no real DMA implementation has been done.

The performance should be poor as there're lots of if clauses.

This is a temporary hack until a real speed switch is available.

The double speed mode is still not available.

Allows usage of tiles from multiple VRAM banks.

Created more panic conditions for the KEY0 and KEY1.