Made read MMU a non mutable operation.
Added support for CPU description.
Added Display support for CPU.
Extracted type definition for `Instruction`.
Support for diag_gb!() - uses global unsafe approach, which is not problematic for the purpose.
Inline fetch() operation in cpu clock.
Moved pedantic validation up in the CPU.
Fix simple diag issue.
Changed naming of read and write unsafe ops to raw.
New pedantic asserts.
Fix an issue with HDMA destination address prevent CHIP-8 ROM from
working.

Allows blargg's test ROM to pass.

Allow simple screenshot saving.

There was no implementation to execution mode flag and loading the state in a halted situation was breaking the emu.

Adds this CPU speed print support to the web debug panel.

With initial approach for scalling down the speed of other components.

Allows the transfer of data according to the specs in dma.rs.

This is only a structure change and no real DMA implementation has been done.

This is a temporary hack until a real speed switch is available.

The code now breaks if pedantic is set and a warning is triggered.

There's already two drivers implemented: Null and Print (to stdout).

The complete GB, CPU and MMU linking is done.