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João Magalhães
boytacean
Commits
ac1b3764
Verified
Commit
ac1b3764
authored
2 years ago
by
João Magalhães
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fat: more new instructions
parent
3c4f52aa
No related branches found
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Pipeline
#866
passed
2 years ago
Stage: build
Stage: deploy
Changes
4
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1
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4 changed files
examples/sdl/src/main.rs
+1
-1
1 addition, 1 deletion
examples/sdl/src/main.rs
src/cpu.rs
+8
-6
8 additions, 6 deletions
src/cpu.rs
src/inst.rs
+36
-16
36 additions, 16 deletions
src/inst.rs
src/mmu.rs
+5
-5
5 additions, 5 deletions
src/mmu.rs
with
50 additions
and
28 deletions
examples/sdl/src/main.rs
+
1
−
1
View file @
ac1b3764
...
...
@@ -79,7 +79,7 @@ fn main() {
.unwrap
();
let
mut
game_boy
=
GameBoy
::
new
();
game_boy
.load_boot_
dmg
();
game_boy
.load_boot_
sgb
();
game_boy
.load_rom_file
(
"../../res/roms.prop/tetris.gb"
);
//game_boy.load_rom_file("../../res/roms/firstwhite.gb");
//game_boy.load_rom_file("../../res/roms/opus5.gb");
...
...
This diff is collapsed.
Click to expand it.
src/cpu.rs
+
8
−
6
View file @
ac1b3764
...
...
@@ -80,6 +80,8 @@ impl Cpu {
return
4
;
}
// gathers the PC (program counter) reference that
// is going to be used in the fetching phase
let
pc
=
self
.pc
;
//@todo maybe remove this option as it may
...
...
@@ -107,12 +109,12 @@ impl Cpu {
let
(
instruction_fn
,
instruction_time
,
instruction_str
)
=
instruction
;
// if !self.mmu.boot_active() {
if
*
instruction_str
==
"! UNIMP !"
{
println!
(
"{}
\t
(0x{:02x})
\t
${:04x} {}"
,
instruction_str
,
opcode
,
pc
,
is_prefix
);
}
//
if *instruction_str == "! UNIMP !" {
println!
(
"{}
\t
(0x{:02x})
\t
${:04x} {}"
,
instruction_str
,
opcode
,
pc
,
is_prefix
);
//
}
// calls the current instruction and increments the number of
// cycles executed by the instruction time of the instruction
...
...
This diff is collapsed.
Click to expand it.
src/inst.rs
+
36
−
16
View file @
ac1b3764
...
...
@@ -140,20 +140,20 @@ pub const INSTRUCTIONS: [(fn(&mut Cpu), u8, &'static str); 256] = [
// 0x8 opcodes
(
add_a_b
,
4
,
"ADD A, B"
),
(
add_a_c
,
4
,
"ADD A, C"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
add_a_d
,
4
,
"ADD A, D
"
),
(
add_a_e
,
4
,
"ADD A, E"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimp
l
,
4
,
"
! UNIMP !
"
),
(
add_a_h
,
4
,
"ADD A, H
"
),
(
add_a_
l
,
4
,
"
ADD A, L
"
),
(
add_a_mhl
,
8
,
"ADD A, [HL]"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
noimp
l
,
4
,
"
! UNIMP !
"
),
(
noimp
l
,
4
,
"
! UNIMP !
"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
add_a_a
,
4
,
"ADD A, A
"
),
(
add_a_b
,
4
,
"ADD A, B
"
),
(
add_a_c
,
4
,
"ADD A, C
"
),
(
add_a_d
,
4
,
"ADD A, D
"
),
(
add_a_e
,
4
,
"ADD A, E
"
),
(
add_a_h
,
4
,
"ADD A, H
"
),
(
add_a_
l
,
4
,
"
ADD A, L
"
),
(
add_a_mh
l
,
8
,
"
ADD A, [HL]
"
),
(
add_a_a
,
4
,
"ADD A, A
"
),
// 0x9 opcodes
(
sub_a_b
,
4
,
"SUB A, B"
),
(
noimpl
,
4
,
"! UNIMP !"
),
...
...
@@ -238,7 +238,7 @@ pub const INSTRUCTIONS: [(fn(&mut Cpu), u8, &'static str); 256] = [
(
call_c_u16
,
12
,
"CALL C, u16"
),
(
illegal
,
4
,
"ILLEGAL"
),
(
noimpl
,
4
,
"! UNIMP !"
),
(
noimpl
,
4
,
"! UNIMP !
"
),
(
rst_18h
,
16
,
"RST 18h
"
),
// 0xe opcodes
(
ld_mff00u8_a
,
12
,
"LD [FF00+u8], A"
),
(
pop_hl
,
12
,
"POP HL"
),
...
...
@@ -255,7 +255,7 @@ pub const INSTRUCTIONS: [(fn(&mut Cpu), u8, &'static str); 256] = [
(
illegal
,
4
,
"ILLEGAL"
),
(
illegal
,
4
,
"ILLEGAL"
),
(
xor_a_u8
,
8
,
"XOR A, u8"
),
(
rst_
1
8h
,
16
,
"RST
1
8h"
),
(
rst_
2
8h
,
16
,
"RST
2
8h"
),
// 0xf opcodes
(
ld_a_mff00u8
,
12
,
"LD A, [FF00+u8]"
),
(
pop_af
,
12
,
"POP AF"
),
...
...
@@ -1229,15 +1229,31 @@ fn add_a_c(cpu: &mut Cpu) {
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
cpu
.c
);
}
fn
add_a_d
(
cpu
:
&
mut
Cpu
)
{
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
cpu
.d
);
}
fn
add_a_e
(
cpu
:
&
mut
Cpu
)
{
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
cpu
.e
);
}
fn
add_a_h
(
cpu
:
&
mut
Cpu
)
{
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
cpu
.h
);
}
fn
add_a_l
(
cpu
:
&
mut
Cpu
)
{
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
cpu
.l
);
}
fn
add_a_mhl
(
cpu
:
&
mut
Cpu
)
{
let
byte
=
cpu
.mmu
.read
(
cpu
.hl
());
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
byte
);
}
fn
add_a_a
(
cpu
:
&
mut
Cpu
)
{
cpu
.a
=
add_set_flags
(
cpu
,
cpu
.a
,
cpu
.a
);
}
fn
sub_a_b
(
cpu
:
&
mut
Cpu
)
{
cpu
.a
=
sub_set_flags
(
cpu
,
cpu
.a
,
cpu
.b
);
}
...
...
@@ -1524,6 +1540,10 @@ fn call_c_u16(cpu: &mut Cpu) {
cpu
.ticks
=
cpu
.ticks
.wrapping_add
(
12
);
}
fn
rst_18h
(
cpu
:
&
mut
Cpu
)
{
rst
(
cpu
,
0x0018
);
}
fn
ld_mff00u8_a
(
cpu
:
&
mut
Cpu
)
{
let
byte
=
cpu
.read_u8
();
cpu
.mmu
.write
(
0xff00
+
byte
as
u16
,
cpu
.a
);
...
...
@@ -1572,8 +1592,8 @@ fn xor_a_u8(cpu: &mut Cpu) {
cpu
.set_carry
(
false
);
}
fn
rst_
1
8h
(
cpu
:
&
mut
Cpu
)
{
rst
(
cpu
,
0x00
1
8
);
fn
rst_
2
8h
(
cpu
:
&
mut
Cpu
)
{
rst
(
cpu
,
0x00
2
8
);
}
fn
ld_a_mff00u8
(
cpu
:
&
mut
Cpu
)
{
...
...
This diff is collapsed.
Click to expand it.
src/mmu.rs
+
5
−
5
View file @
ac1b3764
...
...
@@ -98,13 +98,13 @@ impl Mmu {
match
addr
&
0xf000
{
// BOOT (256 B) + ROM0 (4 KB/16 KB)
0x0000
=>
{
self
.rom
[
addr
as
usize
]
=
value
;
panic!
(
"Writing to BOOT at 0x{:04x}"
,
addr
)
println!
(
"Writing to ROM 0 at 0x{:04x}"
,
addr
)
}
// ROM 0 (12 KB/16 KB)
0x1000
|
0x2000
|
0x3000
=>
{
panic!
(
"Writing to ROM 0 at 0x{:04x}"
,
addr
);
}
0x1000
|
0x2000
|
0x3000
=>
match
addr
{
0x2000
=>
(),
_
=>
panic!
(
"Writing to ROM 0 at 0x{:04x}"
,
addr
),
},
// ROM 1 (Unbanked) (16 KB)
0x4000
|
0x5000
|
0x6000
|
0x7000
=>
{
panic!
(
"Writing to ROM 1 at 0x{:04x}"
,
addr
);
...
...
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Click to expand it.
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