fix: clippy fix

src/apu.rs

@@ -269,7 +269,7 @@ impl Apu {
             return;
         }
 
-        self.sequencer += cycles as u16;
+        self.sequencer += cycles;
         if self.sequencer >= 8192 {
             // each of these steps runs at 512/8 Hz = 64Hz,
             // meaning a complete loop runs at 512 Hz

src/ppu.rs

@@ -598,7 +598,7 @@ impl Ppu {
 
         // increments the current mode clock by the provided amount
         // of CPU cycles (probably coming from a previous CPU clock)
-        self.mode_clock += cycles as u16;
+        self.mode_clock += cycles;
 
         match self.mode {
             PpuMode::OamRead => {

src/timer.rs

@@ -40,14 +40,14 @@ impl Timer {
     }
 
     pub fn clock(&mut self, cycles: u16) {
-        self.div_clock += cycles as u16;
+        self.div_clock += cycles;
         while self.div_clock >= 256 {
             self.div = self.div.wrapping_add(1);
             self.div_clock -= 256;
         }
 
         if self.tima_enabled {
-            self.tima_clock += cycles as u16;
+            self.tima_clock += cycles;
             while self.tima_clock >= self.tima_ratio {
                 // in case TIMA value overflows must set the
                 // interrupt and update the TIMA value to